代表性论文专著
代表作:
[1] Han Y, Sun J, Bae J, Grützmacher D, Knoch J, Zhao Q-T. High Performance 5 nm Si Nanowire FETs with a Record Small SS = 2.3 mV/dec and High Transconductance at 5.5 K Enabled by Dopant Segregated Silicide Source/Drain. 2023 IEEE Symp. VLSI Technol. Circuits (VLSI Technol. Circuits), IEEE; 2023, p. 1–2.
[2] Han Y, Sun J, Richstein B, Allibert F, Radu I, Bae J-H, Grützmacher D, Knoch J, Zhao Q-T. Steep switching Si nanowire p-FETs with dopant segregated silicide source/drain at cryogenic temperature. IEEE Electron Device Lett 2022;43:1187–90.
其他文章:
[3] Han Y, Sun J, Radu I, Knoch J, Grützmacher D, Zhao Q-T. Improved performance of FDSOI FETs at cryogenic temperatures by optimizing ion implantation into silicide. Solid State Electron 2023;208:108733.
[4] Han Y, Sun J, Xi F, Bae J, Grützmacher D, Zhao Q-T. Cryogenic characteristics of UTBB SOI Schottky-Barrier MOSFETs. Solid State Electron 2022;194:108351.
[5] Han Y, Xi F, Allibert F, Radu I, Prucnal S, Bae J-H, Hoffmann-Eifert S, Knoch J, Grützmacher D, Zhao Q-T. Characterization of fully silicided source/drain SOI UTBB nMOSFETs at cryogenic temperatures. Solid State Electron 2022;192:108263.
[6] Roemer C, Dersch N, Darbandy G, Schwarz M, Han Y, Zhao Q-T, Iñíguez B, Kloes A. Physics-based compact current model for Schottky barrier transistors at deep cryogenic temperatures including band tail effects and quantum oscillations. Solid State Electron 2024;212:108846.
[7] Sun J, Han Y, Junk Y, Concepción O, Bae J-H, Grützmacher D, Buca D, Zhao Q-T. Low contact resistance of NiGeSn on n-GeSn. Solid State Electron 2024;211:108814.
[8] Knoch J, Richstein B, Han Y, Frentzen M, Schreiber LR, Klos J, Raffauf L, Wilck N, König D, Zhao Q-T. Toward Low-Power Cryogenic Metal-Oxide Semiconductor Field-Effect Transistors. Phys STATUS SOLIDI A-APPLICATIONS Mater Sci 2023.
[9] Liu M, Junk Y, Han Y, Yang D, Bae JH, Frauenrath M, Hartmann J, Ikonic Z, Bärwolf F, Mai A, Grützmacher D, Knoch J, Buca D, Zhao Q-T. Vertical GeSn nanowire MOSFETs for CMOS beyond silicon. Commun Eng 2023;2:7.
[10] Roemer C, Dersch N, Darbandy G, Schwarz M, Han Y, Zhao Q-T, Iñíguez B, Kloes A. Compact modeling of Schottky barrier field-effect transistors at deep cryogenic temperatures. Solid State Electron 2023:108686.
[11] Xi F, Grenmyr A, Zhang J, Han Y, Bae JH, Grützmacher D, Zhao Q-T. Heterosynaptic Plasticity and Neuromorphic Boolean Logic Enabled by Ferroelectric Polarization Modulated Schottky Diodes. Adv Electron Mater 2023;9:2201155.
[12] Yang D, Wirths S, Knoll L, Han Y, Buca DM, Zhao QT. Enhanced Device Performance with Vertical SiC Gate-All-Around Nanowire Power MOSFETs. Key Eng Mater 2023;945:77–82.
[13] Richstein B, Han Y, Zhao Q-T, Hellmich L, Klos J, Scholz S, Schreiber L, Knoch J. Interface Engineering for Steep Slope Cryogenic MOSFETs. IEEE Electron Device Lett 2022;43:2149–52.
[14] Xi F, Han Y, Grenmyr A, Grutzmacher D, Zhao Q-T. Four-Terminal Ferroelectric Schottky Barrier Field Effect Transistors as Artificial Synapses for Neuromorphic Applications. IEEE J Electron Devices Soc 2022:1–6.
[15] Xi F, Han Y, Liu M, Bae JH, Tiedemann A, Grützmacher D, Zhao Q-T. Artificial Synapses Based on Ferroelectric Schottky Barrier Field-Effect Transistors for Neuromorphic Applications. ACS Appl Mater Interfaces 2021;13:32005–12.